Path: Top -> Journal -> Telkomnika -> 2015 -> Vol 13, No 3: September
A Real-time SAR Echo Simulator Based on FPGA and Parallel Computing
A Real-time SAR Echo Simulator Based on FPGA and Parallel Computing
Journal from gdlhub / 2016-11-16 02:25:30Oleh : Xu Yinhui, Zeng Dazhi, Yan Tao, Xu Xiaoheng, Telkomnika
Dibuat : 2015-09-01, dengan 1 file
Keyword : SAR, real-time simulator, DRFM, parallel computing
Url : http://journal.uad.ac.id/index.php/TELKOMNIKA/article/view/1972
This paper designs and implements a SAR (Synthetic Aperture Radar) real-time echo simulator based on multi-FPGA parallel computing. The one-dimensional frequency-domain Fourier transform algorithm is used in the simulator, and the echo signal model and the rapid calculation algorithm of impulse response function are introduced. The pipeline compute structure, multichannel parallel computing and procedure flow design are the key technologies of the simulator, which are also presented in details. And finally, the validity and correctness of the SAR echo simulator are verified through the imaging results of the point-array target and the nature scene target.
Deskripsi Alternatif :This paper designs and implements a SAR (Synthetic Aperture Radar) real-time echo simulator based on multi-FPGA parallel computing. The one-dimensional frequency-domain Fourier transform algorithm is used in the simulator, and the echo signal model and the rapid calculation algorithm of impulse response function are introduced. The pipeline compute structure, multichannel parallel computing and procedure flow design are the key technologies of the simulator, which are also presented in details. And finally, the validity and correctness of the SAR echo simulator are verified through the imaging results of the point-array target and the nature scene target.
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ID Publisher | gdlhub |
Organisasi | Telkomnika |
Nama Kontak | Herti Yani, S.Kom |
Alamat | Jln. Jenderal Sudirman |
Kota | Jambi |
Daerah | Jambi |
Negara | Indonesia |
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