Path: Top -> Journal -> Telkomnika -> 2020 -> Vol 18, No 5, October
A power efficient delta-sigma ADC with series-bilinear switch capacitor voltage-controlled oscillator
Oleh : D. S. Shylu, P. Sam Paul, D. Jackuline Moni, J. Arolin Monica Helan, Telkomnika
Dibuat : 2021-01-25, dengan 1 file
Keyword : amplifier; continuous-time (CT) delta-sigma (ΔΣ); loop filter; switch capacitor circuits; voltage-controlled oscillator (VCO)-based ADCs;
Url : http://journal.uad.ac.id/index.php/TELKOMNIKA/article/view/14034
Sumber pengambilan dokumen : web
In low-power VLSI design applications non-linearity and harmonics are a major dominant factor which affects the performance of the ADC. To avoid this, the new architecture of voltage-controlled oscillator (VCO) was required to solve the non-linearity issues and harmonic distortion. In this work, a 12-bit, 200MS/s low power delta-sigma analog to digital converter (ADC) VCO based quantizer was designed using switched capacitor technique. The proposed technique uses frequency to current conversion technique as a linearization method to reduce the non-linearity issue. Simulation result show that the proposed 12-bit delta-sigma ADC consumes the power of 2.68 mW and a total area of 0.09 mm² in 90 nm CMOS process.
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Organisasi | Telkomnika |
Nama Kontak | Herti Yani, S.Kom |
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Kota | Jambi |
Daerah | Jambi |
Negara | Indonesia |
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